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Altera_Forum's avatar
Altera_Forum
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13 years ago

State Machines - advantages and disadvantages

Hi Guys,

I would like to ask the next question:

As a rule, I buidling the state machine when my inputs and outputs are places in the same state machine. But in Mealy/Moore state machine there is a separation betwen them - state machine for inputs and state machine for outputs.

For example:

case state_machine is

when Idle =>

if(input = '1') then

output <= '1';

state_machine <= State_1;

else

output <= '0';

state_machine <= Idle;

end if;

when State_1 =>

if(input = '1') then

output <= '1';

state_machine <= Idle;

else

output <= '0';

state_machine <= State_1;

end if;

end case;

This code is meaningless but helps u to understand my question...

The question: What way is more "healthy" and more effective for building the state machines - separating inputs and outputs as mealy\moore or it's possible to build it in my way? Can my state machine be stucked in because of it?

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    The most important thing is that it is all synchronous (as much as possible), is clearly readable with good comments, is well testbenched and that it does what you need it to do. The mealy/moore question is pretty redundant.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hi,

    I think that are only different ways to constitute the state machine. Choose the way which is more clearly for you, the way which is more readable. I think there should not be performance differences.

    I place my inputs and outputs in the same state machine, because for me this is the more logical style.

    Greets

    Sim
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hi,

    while all types of coding (assuming correct code) should result in same behaviour, there might be some difference in resource usage. But I'm not pretty sure myself currently..

    Assuming the written directives are translated to hardware more or less directly, the coding style with both, state transisitions and outputs in the same process might end up with the output signals being decodede not only by the current state but including the input signals as well. If there are two processes - one including states and state transisitions and a second to define the output signals only depending on the actual state this might be a more resource efficient style (while it's definitely far less readable as you need two tables to identify the transition and the output conditions...).

    Has anyone tried to implement a more or less small FSM in these two styles to compare the resource usage in e.g. Cyclone devices which are more register than LUT based...?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    Hi,

    while all types of coding (assuming correct code) should result in same behaviour, there might be some difference in resource usage. ... ...

    Has anyone tried to implement a more or less small FSM in these two styles to compare the resource usage in e.g. Cyclone devices which are more register than LUT based...?

    --- Quote End ---

    Ok, you might be right. But I never thought about it and used the more readable style all the time.

    But you are right, it would be interesting, if there are differences in resource usage. Could anyone make a declaration about this topic?

    Greets sim