State Machine Viewer State Machine Missing

Hi I have a state machine below.

reg [4:0] sm;

localparam SM_IDLE = 5'h0;

localparam SM_EXP_START = 5'h1;

localparam SM_EXP_END = 5'h2;

localparam SM_RDOUT = 5'h3;

//-----------------------------------------------------------------------------------------------------------------------

// State Machine Block

//-----------------------------------------------------------------------------------------------------------------------

always @ (posedge clkpix or posedge reset or posedge sys_reset) begin

if(sys_reset | reset) begin

sm <= SM_IDLE;

exposure_0 <= 1'b0;

stfrm_out_0 <= 1'b0;

stln_out_0 <= 1'b0;

end

else begin

case (sm)

SM_IDLE: begin

if (slave_enable & tp) begin

exposure_0 <= 1'b1;

stfrm_out_0 <= 1'b0;

stln_out_0 <= 1'b0;

sm <= SM_EXP_START;

end

else begin

exposure_0 <= 1'b0;

stfrm_out_0 <= 1'b0;

stln_out_0 <= 1'b0;

sm <= SM_IDLE;

end

end

SM_EXP_START: begin

if(exp_line_cnt == BELI_KURZ_ZEIT) begin

exposure_0 <= 1'b0;

stfrm_out_0 <= 1'b1;

stln_out_0 <= 1'b0;

sm <= SM_EXP_END;

end

else begin

exposure_0 <= 1'b1;

stfrm_out_0 <= 1'b0;

stln_out_0 <= 1'b0;

sm <= SM_EXP_START;

end

end

SM_EXP_END: begin

if (exp_rowend_cnt == ROW_TIME) begin

exposure_0 <= 1'b0;

stfrm_out_0 <= 1'b0;

stln_out_0 <= 1'b1;

sm <= SM_RDOUT;

end

else begin

exposure_0 <= 1'b0;

stfrm_out_0 <= 1'b1;

stln_out_0 <= 1'b0;

sm <= SM_EXP_END;

end

end

SM_RDOUT: begin

if ((stln_cnt == FRAME_TIME)) begin

exposure_0 <= 1'b0;

stfrm_out_0 <= 1'b0;

stln_out_0 <= 1'b0;

sm <= SM_IDLE;

end

else begin

exposure_0 <= 1'b0;

stfrm_out_0 <= 1'b0;

stln_out_0 <= 1'b1;

sm <= SM_RDOUT;

end

end

endcase

end

end

I cannot see any state machine in the State Machine Viewer, but the design works as expected. Why can't i see any state machines in the viewer ? In the viewer the design is detected as a state machine, but no state changes, inputs or outputs are shown. Any help is appreciated.. thanks..