--- Quote Start ---
This is what it looks like to me:
T0: Launch_FF latches a new value
T1: Latch_FF latches a bad value, as the previous transition from Launch_FF hasn't completely propagated yet
T2: Latch_FF latches a good value as the previous transition finally had time to propagate;
downstream_ff latches a bad value, from the bad value launch_ff had before.T3: Downstream_FF finally latches a good value.
--- Quote End ---
My point is that the statement in bold doesn't apply. The reason is that downstream combinational logic will block the metastable signal from reaching the next register. Only at T2 will the combination logic let the Latch_FF.Q signal through to the next register. At T2 the Latch_FF.Q will not be metastable.
Honored Contributor
