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Altera_Forum
Honored Contributor
Honored ContributorSTA Timimg Report Question
Why does the same clock path have different IC delays calculated for the launch and the latch clock? Is the STA using different operating conditions or delays? - for example max for launch and min fo...
Altera_ForumHonored Contributor
Honored ContributorGood eye. This is On-Die Variation, and is variation within a given operating condition, not across different ones. Common Clock Path Pessimism should remove most of that variation on the clock tree. I discuss these in Section 5 of the following:
http://www.alterawiki.com/wiki/timequest_user_guide
