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Writing an MM-Slave wrapper around a general SPI-master is not that difficult.
What specific device is your external SPI slave?
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It is a MPU serial Interface consisting of serial clock SCLK, serial data SDIN, D/C (data/command), and ChipSelect. this SPI is used to receive display command and data. To control D/C I generated a PIO. To serial data SDIN is MOSI of SPI in FPGA. And MISO of SPI in FPGA is not used.
What do U mean "Writing an MM-Slave wrapper around a general SPI-master is not that difficult."
I tested sending data to SPI with DMA. But without reseting RXdata I can only send Txdata twice due to, I think, receive overrun error.
My Idea is to shut off Rxdata path and its Error bit of status register in SPI master on FPGA. Is it possible?
Thanks all of U guys and have a good day.
Honored Contributor
