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Altera_Forum
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14 years ago

Spi_slave_to_avalon_mm + qsys + pio

Hi! I try to implement very simple design using QSYS. It's SPI to GPIO converter (it's just a part of much more complicated design). I just want to control some GPIOs sending appropriate comman...
Altera_Forum's avatar
Altera_Forum
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14 years ago

@Cris72

Thank You for your answer.

As PIO has base address 0x00 to 0x1f (32 addresses) and "data register" has offset = 0, then the address of "data register" is still 0x00?

What about the whole frame that I have to send (let's say that I want to enable 4 out of 8 outputs)?

Will it be?

4A 7A(Start of packet) 00 00 00 00(cmd) 00 00 00 00(addr) 00 00 00 7B(End of packet) 0F (data)

CMD: 00 00 00 00

ADDR: 00 00 00 00

DATA: 00 00 00 0F (enable 4 out of 8 outputs)

Regards,

Krzysiek