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Altera_Forum
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16 years ago

SPI Pin Assignments

Hi, I ran into a problem trying to assign the MOSI_out_from_SPI signal and/or the SCLK_out_from_SPI signal. I looked in the Altera documentation and it does not appear that these signals requi...
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Altera_Forum
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16 years ago

jakobjones,

I started thinking about your email last night, and when I got in this morning I looked at the project again, specifically at the 'reset'. Somehow, my PLL 'locked' signal was not named properly, and I think the FPGA was able to run in one configuration but hung in another because the reset line was not being conditioned properly. After fixing this, the system compiles and downloads/runs fine. Thanks for pointing me in this direction. Have a great weekend and take care.

Fred