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Altera_Forum's avatar
Altera_Forum
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10 years ago

Specifying LUT's

Hi, I'm currently trying to port the CERN WhiteRabbit TDC, which was originally written for Spartan FPGAs, to Cyclone4. The code contains a ring oscillator build out of hand specified LUTs...
Altera_Forum's avatar
Altera_Forum
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10 years ago

LUT* takes the value of INIT as a bit string that defines its output. The input pins are used as an address into this string.

The LUT1 is basically just a buffer element while the LUT2 implements an AND gate with an inverted input to start/run the ring oscillator.

No, a PLL does not work. The ring oscillator is there to measure the effects of temperature and voltage variation on the chip to compensate those variations in the delay chain used for the TDC itself. You can find the details of the design in http://www.ohwr.org/attachments/855/tdc_v3.pdf

Yes, I know that I will have to do some manual placement to get things to work correctly. This is to be expected when building TDCs.