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Altera_Forum's avatar
Altera_Forum
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10 years ago

Specifying LUT's

Hi, I'm currently trying to port the CERN WhiteRabbit TDC, which was originally written for Spartan FPGAs, to Cyclone4. The code contains a ring oscillator build out of hand specified LUTs...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

... and what the definition for LUT1 and LUT2... <- doesn't matter

It seems clock generated from logic (one-shot multivibrator) <- if you read book you saw many exclamation about it

perhaps it is better to redesign block so you get managable value for output frequency

(1) no dependacy logic elements are placed somewhere far from each other in the chip

(2) why you do not want to use external clock with PLL?