Altera_ForumHonored Contributor14 years agoSOS!Why the VCCIO for PCI must be 3.0V in cyclone IV?I want to know Why the VCCIO for PCI must be 3.0V in cyclone IV? It makes the power division for FPGA more complicated. Thanks!
Recent DiscussionsPart Status requestAgilex 7 DDR4 Reset and ADDR/CMD Clock PCB Implementation Documentation DiscrepancyVcm for the clock input pins of agilex5 E-series FPGA A5ED065BB32AE5SR0Arria 10: Remote Update Factory Fallback won't work & Watchdog does not triggerIBIS models GTS banks agilex 5E