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Honored Contributor
Honored ContributorSOPC ERROR: Cannot have an associated clock
Hi, I'm trying to generate a SOPC component from a VHDL file. I want to make an I2C component. The VHDL basis ist the I2C Master/Slave from opencores. I modified it in that way, that I only nee...
Altera_ForumHonored Contributor
Honored ContributorI don't disagree with the SOPC builder manual. For your component, you must declare 3 interfaces:[list][*]a clock/reset input[*]an Avalon memory mapped slave[*]an export interface[/list]Each signal falls in one of those interfaces, and all the signals that are part of one interface must share the same interface name. That way they will all be regrouped by the component builder.
It is more difficult to follow the same convention with the export signals, as they would be all called "export". You could either declare a specific interface name for each individual signal (coe_sda_export, coe_scl_export) or put them all in one export interface and choose not to follow the convention. I usually choose the latter option.
