Forum Discussion
Altera_Forum
Honored Contributor
14 years agoThanks Mark
I've got another issue, while adding my top level variables in SOPC (so as to get them in system.h while building my hello_led.c in NIOS II), i'm facing signal width compatibility issues. The following are my input and output in toplevel; input clk, input reset, //inputs from low-level software (MAC/PHY) to my toplevel input [31:0] data_in_from_ethernet, input [1:0] data_in_from_ethernet_type, input cpu_ip_done, input [7:0] cpu_ip_index, input cpu_arp_done, input [2:0] cpu_arp_index, //inputs exchanged to my other modules input data_out_from_app_valid, input [31:0] data_out_from_app, input [31:0] dest_ip_addr, input [15:0] dest_port, input [15:0] data_out_from_app_length, //outputs from low-level software (MAC/PHY) to my toplevel output ack, output cpu_ip_ready, output [47:0] cpu_ip_mac, output [31:0] cpu_ip_data, output [7:0] cpu_ip_length, output cpu_arp_ready, output [47:0] cpu_arp_mac, output [31:0] cpu_arp_data, //outputs exchanged from my other modules output data_in_to_app_valid, output [31:0] data_in_to_app, output [15:0] input_port By default, it takes signal type as "export" and interface as "avalon_slave_0", which results in; # 2012.04.08 23:24:40 (*) Running Generator Program for cpu_0 ERROR: slave (toplevel_inst/avalon_slave_0) data width is 0 Error: Generator program for module 'cpu_0' did NOT run successfully. ---------------------------------------------------------------------- I tried setting all possible options for input and output, unable to proceed especially "cpu_ip_mac" whose width is 48 is not workingout. Is there an option to handle this width issue? Thanks Liana