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Altera_Forum's avatar
Altera_Forum
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17 years ago

SoPC - VHDL questions

Hi, I ran into a couple of questions: I'm building a new component for the SOPC. It generated a template that seems to me not 'generic' VHDL entity pio_TERAchip_data is port ( ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I have a related problem.

A line from a test bench generated by the SOPC builder:

active_and_waiting_last_time <= std_logic'('0');

Ncsim doesn't like this. Here is the warning message:

"white space assumed after apostrophe [13.5]"

The same construct for std_logic_vector is accepted:

No warning or error for this line:

address_from_the_master_0_last_time <= std_logic_vector'("00000000000000000000000000000000");

Can anyone explain this? I don't like warnings that I don't understand.