Some problems about Configration and board debug
Hello , everyone , I have designed a board , which contains four Stratix 2 devices (EP2S180F1020C5N) , I have added some wires between them and tied directly to the IOs of each device . Also I have added several switches to change the configration mode : AS or JTAG , respective or chain . First , I just weld only one device on the board and verification some fuctions of my design such as configration ,the power system of the device and so on , the resuit shows that it Ok . Then I have weld the rest 3 devices on the board , however , problems occur as follows : If I download the .sof file to one of the device (the other JTAG interface are shut down by swiches) via JTAG interface , the Quartus shows dowload successful , but after download 100% , the device has no responce ; If I download the .jic file , the Quartus shows operation failed ; If I download the .pof file via AS interface ,the Quartus shows download successful and the device has no responce too . The wires which are JTAG related of each devices can be separated by the switches , the wires which are AS related of each device except DCLK and DATA can also be separated by the switches . Each device has some IOs (I ensure they are User IO ) tied directly to other's . I am mazing why I succeed before and failed when all of the device are welded on the board even if I power off the rest 3 device .