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Honored Contributor
Honored ContributorSome problems about altera_pll on cyclone V device
Hello everyone, I just met a problem about altera_pll on my cyclone V board. There is a 5CEFA4F23C8 FPGA on my board and the FPGA is conneted to a crystal oscillator via a clock input pin. ...
Altera_ForumHonored Contributor
Honored ContributorI faced the same problem and the PLL was not locking. The RREF_TL was left floating. The issue was partially solved after fixing this floating pin.
