Soc/HPS based on DE10-Nano : how do I program a DPR and/or UART

I found the problem by myself, I did not care about the axi_master which is necessary for a dual_ported_RAM. Code has to be changed:

# define ALT_AXI_FPGASLVS_OFST (0xC0000000) // axi_master

# define HW_FPGA_AXI_SPAN (0x40000000) // Bridge span

# define HW_FPGA_AXI_MASK ( HW_FPGA_AXI_SPAN - 1 )

//

void *axi_virtual_base;

axi_virtual_base = mmap( NULL, HW_FPGA_AXI_SPAN, ( PROT_READ | PROT_WRITE ), MAP_SHARED, fd,ALT_AXI_FPGASLVS_OFST );

//

DPR_addr = axi_virtual_base + ( ( unsigned long )( DPR_BASE ));

//

-> Now, also the memcpy works, see my example:

memcpy((void *)(DPR_addr), &RLDRIVE.rl_drive_i[0], 11520); // RAM => DPR

memcpy(&RLDRIVE.rl_drive_i[0], (void *)(DPR_addr), 11520); // RAM <= DPR

...

I still have the problem, that I can't load my .rbf file