Single wire can bus and bidirectional pin coding

Thanks! I will try it out and update here.

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In FPGAs, do not use tri-state logic outside the top level module. Instead, if you need to connect your bidir_port to modules inside your toplevel, use the trio of bidir_port_i, bidir_port_oe and bidir_port_o.

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On the above point, is it important for me to put the tristate code on the top level, even if my bidir_port module's bidir signal is connected directly to the output pin on the top level?