Forum Discussion
New ContributorSingle-Ended I/O Performance on MAX10
The answer to your question is that Altera/Intel no longer supplies single-ended toggle rate information. They tell you to do an IBIS simulation. This is very frustrating when all you typically want to know is whether "low speed" means 100Mhz, 10Mhz or 1Mhz.
ContributorThe answer to your question is that Altera/Intel no longer supplies single-ended toggle rate information. They tell you to do an IBIS simulation. This is very frustrating when all you typically want to know is whether "low speed" means 100Mhz, 10Mhz or 1Mhz.
akohlsmithYes, that is exactly where I'm coming from! I would like a general idea, not an exact number. Can I/O in bank 8 at 3.3V LVCMOS handle 125MHz DDR? I am suspecting that the single-ended numbers are poor which is why they stopped publishing them. Does anyone happen to have the 10M25DAF256 pinout documents from before December 2016? This is so frustrating.
