simulation on the internal clock of cpld

is there a way to make a simulation on the internal clock of cpld in the model sim without connecting it to the card with the cpld?

i mean if i can simulate with the vhdl file i got from the mega function on the quartus? .

i am trying to simulate the vhdl code i wrote with the mega function vhdl code from the quartos and for the internal clock of the cpld i got "u" ,it doesnt recognize the clock.

is there other way to simulate the internal clock?