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Elias97
New Contributor
New Contributorsimulation of pll intel fpga ip with pll reconfig intel fpga ip
Hi, good afternoon, I am doing an FPGA project in which I use two components from the Quartus Prime 18.0 library: PLL intel fpga ip and the PLL Reconfig intel fpga ip. With these two components I am ...
Unfortunately, I currently did not have the design example for the lite version. I really apologies.
Elias97New Contributor
New ContributorThanks for the answer, I can't see the example because I have the Quartus Prime Lite 18.0 version, do you have another example for my version?
