Forum Discussion
Altera_Forum
Honored Contributor
14 years agoI would avoid using modelsim projects. They are a bit useless.
learn it using the command line: navigate to the working directory with cd, ls (like linux) # create work library vlib work # compile files vcom my_file.vhd (or vlog my_file.v for verilog) # simulation vsim my_entity_tb # run -all to run forever, or specify a time amount. run