Simulate with ModelSim SE6.5 error

Hi Dears:

I simulated rom with ModelSim 6.5 and got below error:

"# ** Error: (vsim-13) Recompile altera_mf.altsyncram because std.textio has changed.# ** Error: (vsim-12) Recompile work.ppucore(rtl) after altera_mf.altsyncram is recompiled.# Load interrupted# Error loading design"

Do anyone encounter these errors?

Below is my simulation tcl file comments:# Compile all source files and testbench

project compileall# Load design into simulator incorporating megafunction and transceiver# libraries

vsim -L lpm -L altera -L altera_mf -L sgate -L ArriaGX -L arriagx_hssi -t 1ps work.ppucore_tb# Set up Wave window with transceiver block signals

do wave.do

run 20 us