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I want to be able to create a definition of pin inputs to pin outputs using text file(s).
In this way I can write a Windows program to generate the definition of what FPGA input pin connects to what FPGA output pin.
This would remove a lot of manual steps involved in keeping various project definitions aligned.
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Ok.
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I am used to using ISVLever & in that tool you could specify pin assignments using a text constraints file.
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Ok, then the Quartus Tcl scripting should do what you want.
Do you have an Altera development kit? I've created Tcl examples for several kits. I can point you to an example, so you can see how the Tcl scripts can automate the design. This makes project maintenance much easier.
Cheers,
Dave
Honored Contributor
