Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorSignalTap problems
Hi, I am trying to figure out the reason behind a problem I am having with SignalTap. I am using the triple speed ethernet core on a Stratix GX II FPGA. My FPGA board is connected to a PC...
Altera_ForumHonored Contributor
Honored Contributori agree with you,but that a question:
how did we choice the clock when we using the signalTapII? what is the principle?
