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Hi,
I am using Quartus II for Cyclone II device. I have USB blaster for JTAG connection.
I am trying to use signal tap II analyzer. When I try to recompile the file, after setting the instance and trigger conditions it is giving the following error messages
"
Error: Node instance "instance_1" instantiated with unknown parameter "SLD_ATTRIBUTE_MEM_MODE"
Error: Can't elaborate inferred hierarchy "sld_signaltap:instance_1"
Error: Quartus II Analysis & Synthesis was unsuccessful. 2 errors, 3 warnings
Error: Peak virtual memory: 175 megabytes
Error: Processing ended: Tue Apr 28 16:55:03 2009
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:04
Error: Quartus II Full Compilation was unsuccessful. 4 errors, 3 warnings
"
I am pretty new to FPGA design. Pleae help me out with this issue.
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Hi,
which Quartus Version did you use and how did you setup the signaltap file ?
Kind regards
GPK
Honored Contributor
