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Altera_Forum
Honored Contributor
12 years agoShifted clock signal when connecting to FPGA (cyclone iii)
Hello, I am getting some strange behavior that I can't understand what would be causing the behavior. I have a 32MHz crystal oscillator that I've been trying to use as a digital clock signal to drive...
Altera_Forum
Honored Contributor
12 years agoPLLs can be generated via the megawizard. see the PLL documentation on the altera website
http://www.altera.co.uk/literature/ug/ug_altpll.pdf