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Altera_Forum
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Honored ContributorSharing PLL - using SOPC Builder
Hello folks,
I have instantiated 3 DDR3 Memory controllers into the Nios II CPU and each memory controller uses its own PLL (3 PLL's used). As all the memory controllers operate on the same clock frequency, I want to share the PLL resources. In the manual from Altera - emi_tut_ddr.pdf, they mention to 'select' the option - use clocks from another controller in the Controller Settings tab of the MegaFunction Wizard ALTMEMPHY for the DDR3 SDRAM. I have selected this option for 2 of my memory controllers. However, after generating the SOPC, I still end up using 3 PLL's for the 3 memory controllers :confused:. What is it that I am doing wrong? Is there any way to share the PLL resources as I just want to use 1 PLL if possible. Any help would be great!6 Replies
Altera_ForumHey,
Thanks for the link. I think I already had a looked into this example sometime back. Anyway, I tried it again - Downloaded the project, Restored it and Compiled. result: "The compilation report says 3 PLL's and 1 DLL used!" So, I guess only the DLL's were shared. What about the PLL's? I want to know whether there is any possibility of sharing the PLL's so that I use just 1 PLL for 3 DDR3 Memory Controllers w.r.t this example.- Altera_Forum
Uniphy, but here is an example of three ddr3 ALTMEMPHY sharig pll/dll :
http://www.altera.com/support/examples/vhdl/vhd-stratix-iv-3-ddr3-altmemphy-dll-pll.html - Altera_Forum
Hi,
Are you using the ALTMEMPHY or UniPHY? - Altera_Forum
Hi I found the solution, it's in this file http://www.altera.co.jp/literature/hb/external-memory/emi_tut_qdr.pdf
you have juste to follow the instractions and it works ... good luck - Altera_Forum
Hi,
Unfortunately, I still have the problem and I don't know what to do! - Altera_Forum
hi, did you find a solution for your probleme? I have the same...
Thank you
