Sharing memory: Nios and HDL-module

Avalon arbitration is explained in sopc user guide:

http://www.altera.com/literature/ug/ug_sopc_builder.pdf

Arbitration logic is embedded in the Avalon system interconnection fabric. The arbiter holds a master with the waitrequest signal, so you only need to check this signal. You don't manage request/grant signals like in a classic shared bus architecture.

lock is only used to prevent arbiter from interrupting bursts and granting access to another master.