SEU ref. design and map of care/don't care bits

Hello

Recently I read a White paper with title Robust SEU Mitigation with StratixIII FPGAs. In this paper, it is said that StratixIII FPGA has a hard logic CRC Engine that employs a 16-bit CRC value per CRAM frame for SEU mitigation. If a CRAM error is detected by the circuitry within a frame, CRC engine pulls high the CRC error pin, so appropriate action must be taken, such as reconfiguring the FPGA. Also it is mentioned that a critical error detection capability is implemented in soft logic using a reference design that is supported from Quartus II 7.2 onward.

The operation of the critical error detection solution is as follows:

1. Detect and locate the configuration soft error using the built-in soft error detection circuitry. This asserts the

CRC_ERROR pin.

2. The soft logic then takes the error information and uses it to calculate an address within a file containing a map

indicating which configuration bits are “care” or “don't care.”

3. Using a user-specified memory interface, such as the active serial configuration port, the soft logic then accesses

the appropriate bit in a sensitivity map file to determine if the particular configuration soft error is critical to the

design currently configured into the FPGA.

4. If the configuration soft error is a “don't care,” then the FPGA can continue operating without a functional error.

If the configuration soft error is a “care” and may be affecting functionality, then the CRITICAL_ERROR pin is

asserted and the appropriate action can be taken within the system, such as reconfiguring the FPGA.

The file containing the map of “care”/”don't care” bits is automatically generated by the Quartus II design software

for a particular design according to resource usage and the utilized routing.

my question is where could i find the soft logic "critical error detection" reference design and also what extension has the map of “care”/”don't care” bits which is automatically generated by the quartus ii software.

Thank you in advance.

Dimitris Agiakatsikas