Serial RapidIO Megafunction

Hello, I have a question about Serial Rapidio Megafunction. A use Arria II GX Development Kit and I try to send data (packet) via transceivers channel. I need to send data to TX port and through HSMC loopback header received it on RX port on the same Rapidio Megafunction in FPGA (1xlink/1250 Mbps). Is it possible? I use my own Avalon MM Master component, which creates access to avalon bus (as a state machine in VHDL) without NIOS. This component is connected to rapidIO (to sys_mnt_slave, io_read_slave, io_write_slave). The io_write_master and io_read_master are connected to onchip memory. I have set the transmit slave window(base, mask, offset) and the receive master window through sys_mnt_slave, but if I try to write data to io_slave_write, the data are not writen to onchip memory (through loopback). I didn´t find how to initialize the Rapidio megafunction. Can someone help me or post me some good tips? Thank you very much.

Yours sincerely Joey