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Altera_Forum
Honored Contributor
17 years agoThis design should be basically equivalent to EPC2 factory SFL design.
Although my example originates from EPC3, I have also used it with Cyclone II without problem. There may be a problem, that an unconfigured AS memory device is interfering with JTAG. The Quartus programmer has an option "Halt on-chip configuration controller" to avoid this situation. As a (really trivial) reason, the sof-file selected in Quartus programmer may be different from the current compiled design.