Forum Discussion
Occasional ContributorSerial Flash Loader IP not working with A10 and EPCQL512
When comparing the behavior of the factory SFL image and my design with SFL IP added I still don't understand why the attached serial flash shows up in a JTAG scan with the factory image loaded, and not in a scan when my design is loaded.
However, after deciding to assume that the SFL in my design otherwise works and testing JTAG access to serial flash (such as doing a flash verification operation without having to first load the factory SFL image) the SFL IP does appear to bridge JTAG and ASMI.
I create and load a jic file as usual, then uncheck the box for configuring the factory SFL image prior to flash access. My design remains loaded in the FPGA, and I can verify or load the flash without disturbing FPGA operation.
So it works for my purposes, although with a minor quirk of not being able to detect the flash presence via a scan.
Regular ContributorSOF programming doesn't require SFL loader as it doesnt interact with the flash memory. Thus when you are attaching a SOF file, you dont see SFL loader there.
billmaxYou miss the point of my complaint, which is not about the sof load, but what happens (or doesn't) after my design image is sof loaded into the device.
As I understand it, the intent of the SFL IP is to bridge JTAG to ASMI, just as is done in the factory SFL image typically used in jic programming of attached serial flash devices. After I do a typical flash programming operation, which loads the factory SFL image into the FPGA, I can observe the functionality of that bridge because an auto detect shows the attached flash device.
I am expecting the same behavior from my design when it contains SFL IP, and I don't see that.
My intent is to be able to access the flash via JTAG without having to load the factory SFL image.
