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Altera_Forum
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12 years ago

SERDES, must be driven by a dedicated clock pin of the PLL

Hello, the complete message is: Input clock of PLL which drives at least one nonDPA mode SERDES, must be driven by a dedicated clock pin of the PLL. My configuration: - Cyclone ...
Altera_Forum's avatar
Altera_Forum
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12 years ago

Why is it impossible to use an altctrl block as clock source for the serdes' PLL? Isn't that the way that even Altera suggests?

http://www.altera.com/support/kdb/solutions/rd09252012_453.html

http://quartushelp.altera.com/13.1/master.htm#mergedprojects/msgs/msgs/ecclk_pll_clkin_not_placed_in_dedicated_input.htm?gsa_pos=1&wt.oss_r=1&wt.oss=the%20pll%20reference%20clock%20was%20not%20placed%20in%20a%20dedicated%20input%20pin%20that%20can%20reach

It is still complaining about the lack of a dedicated clock pin. The altclkctrl is, of course, driven by a dedicated clock pin.