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I may be confusing what "dedicated" serdes logic means. Documentation says Cyclone 5 has dedicated logic.
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That basically means they have a high-speed shift-register hard-IP block.
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What I'm after is DPA capability. Looks like that is not an option for this device. The document you linked shows that in Dec. 2012, they removed DPA support.
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Ok, I see that same note.
The Stratix series devices have DPA. A quick search in the Arria V handbook shows they have it too.
If you do not need dynamic phase-shifting, but do need some sort of power-on alignment, you could also consider using the ALTPLL_RECONFIG block and shift the phase of the ALTLVDS PLL (you can configure the ALTLVDS component for external PLL mode).
Cheers,
Dave
Honored Contributor
