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Altera_Forum
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12 years ago

SDRAM on DE0-nano board

Hi, I am still not having any success writing and reading from the SDRAM on on the DE0-nano board from the FPGA. I have built a system in qsys which includes a Nios II and SDRAM controller an...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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I'm not seeing an error. Just when I write to the SDRAM controller and try and read it back , the value is either 0xffffffff or just the last 8 bits are as expected.

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I'd call that an error :)

You don't see this error with the example I gave you, right? Try comparing the top-level design. Perhaps you have made a simple mistake and not connected the ports on your Qsys instance correctly. Does the Quartus messages window have any weird looking messages?

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To do a simulation, I need to create some testbench?

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Yes, but first try tracing the RAM access using SignalTap II.

Cheers,

Dave