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Altera_Forum
Honored Contributor
10 years agoSDRAM Clock
Hi, I use SDRAM controller to connect FPGA and SPANSION(167 MHz) SDRAM. Nios II processor run up to 100 MHZ clock and I can not use higher frequency. I did not use dedicated PLL FPGA pin for S...
Altera_Forum
Honored Contributor
10 years agoYou can certainly select different clocks for processor, memory or whatever, but you need to add a clock crossing adapter between these system sections.
This solution could be convenient if you have one or more devices with a smaller fmax than most of the others. But Nios and onchip memory are generally able to run at the same clock rate, so I think separate clocks is not the best option. Consider that clock crossing circuitry involves delays, data latencies and resource usage. So, running the whole system with a single clock, could possibly lead to better performance, although you have to use a lower clock frequency.