Sdram Capacity

SDRam has multiplexed adr lines.

so the full adress is not the address span with pin A0-A11

Thats why CAS and RAS are used

CAS means column address strobe

RAS means row address strobe

for the full memory address, the sdram controler must strobe the column and the row address bits.

but CAS width is not the same as RAS width.

for example, the Micron MT48LC16M16 SDRam Chip has

1 Chip Select

2 Banks to select upper and lower 8 bit

13 Rows

9 Column

8 Bit per Bank ! (16Bit total due to 2 Banks)

That is 2^13 * 2^9 * 16 = 64MBit

So have a look at the device and its datasheet