Forum Discussion
BrixtonBan
New Contributor
New ContributorS10 IO Pin Slew Rate
we are using a S10 FPGA on our design which one part of design emulates a SPI Slave device. When we run the design by connecting to another SPI Master, we are seeing failure on high frequency (50MHz ...
Ash_R_Altera
Regular Contributor
Regular ContributorHi,
Recommendations:
1) Check the IO standard that you are using.
2) Perform board level simulation to check the signal integrity of the board.
3) Adjust slew rate and drive strength of the pIn using Pin Planner: 2.2.2. Assigning Slew Rate and Drive Strength (intel.com)
Regards
