lambert_yu
Contributor
3 years agorx simplex of transceiver reset problem
Hi all,
env : one rx simplex transceiver channel on one bank; one tx simplex transceiver channel on another bank;
data pattern : prbs20
fpga & quartus version: 10ax115n2f45i2sg/ quar...
- 3 years ago
Hi,
Please assert the rx_analog_reset input to the reset controller that resets the RX CDR and RX PMA blocks of the PHY and that puts CDR in lock to ref clock then locked to data mode and then release the analog reset.
Thank you
Kshitij Goel