Forum Discussion
rx_freqlocked signal on Cyclone IV GX
I'm seeing strange behavior from the rx_freqlocked signal that's output from the Cyclone IV transceiver block in basic mode.
According to the transceiver documentation: --- Quote Start --- In automatic lock mode, the switch from LTR to LTD states is indicated by the assertion of the rx_freqlocked signal and the switch from LTD to LTR states indicated by the de-assertion of the rx_freqlocked signal. --- Quote End --- However, I'm seeing this signal asserted even when there's no data available at the receiver for the for the CDR to lock to. Clearly I'm not understanding exactly what this signal is telling me. Does anyone have some insight on this? Thanks13 Replies
- Altera_Forum
Honored Contributor
thank you for help!:)
- Altera_Forum
Honored Contributor
Sorry for the delayed response, I haven't been checking here recently.
As far as I can tell, the rx_freqlocked signal is simply broken. I'd love to hear otherwise, but no one that's posted here has ever reported getting it to work. I had a support request in to Altera for 8 months and my impression was that they never even really tried to reproduce the problem. I finally let the support request expire out of frustration. If anyone ever gets this to work, please post here and let us know. For now though I'd recommend just working around it. - Altera_Forum
Honored Contributor
hi,
i had met the same problem, i used the quartus11.1, but the rx_freqlocked is struck assert. i have no idea, do you have any suggestion about it ? thanks a lot!! - Altera_Forum
Honored Contributor
I got my circuit to work. I justed ignored the rx_freqlocked signal. I used an external signal detect to cause it to manually lock.
- Altera_Forum
Honored Contributor
Hi Jon, sorry for the delayed response. I haven't been checking back here.
Yes, other then the rx_freqlocked signal, the high speed serial interface seems to be working fine for me. Finally, after 4.5 months of the service request being opened, the support engineer has decided to try to look into the problem. I'll post back if it ever gets resolved. - Altera_Forum
Honored Contributor
other than the rx_freqlocked did you get it to work? like I said half the time I power up and I can send and recieve data and the other half it doesn't receive.
- Altera_Forum
Honored Contributor
I have the same exact problem. I am tempted to move back to 10.1 and install th service pack to see if that works.
I don't care to much about the rx_freqlocked signal. It's just my design works half the time. Sometime it starts up and works and continues to work, and sometimes it starts up and doesn't receive anything. I am assuming it doesn't lock to the correct signal?? or the reset sequence is messed up. But if the rx_freqlocked signal is not working properly then it's possible something else isn't working. - Altera_Forum
Honored Contributor
Thanks for the suggestion.
One of the first things I pointed out to the support team in my service request was the fact that there was a known bug listed for 10.1 which described the exact problem I'm seeing. I asked if that bug was fixed in 11.0, but that question was never answered. I'm quite disheartened by the response I've gotten from Altera support on this issue. It's been two months since the SR was open and, aside from trying to close the request I received little response from my support engineer. I'm considering opening a different request on the same issue in hopes that it gets assigned to someone else. - Altera_Forum
Honored Contributor
if the SR is still open, ask for confirmation that the "SPR" was fixed in releases after 10.1
- Altera_Forum
Honored Contributor
I'm bumping this thread in hopes that someone out there has some insight on my problem.
I've been working on this system for a couple months now, and the rx_freqlocked signal is still completely non-functional no matter what I do. Altera support is useless. Has anyone been able to get the rx_freqlocked signal to work on a Cyclone IV GX?