Honored Contributor
Honored ContributorI'll will examine what Quartus does, but it seems curious that the PLL_OUT pin can only be pseudo-differential, but if I use a regular out pin, I can drive the pins in true differential, like LVDS. Either way, if I am using this signal to feed a clock jitter cleaner chip, it seems like I will suffer (either because I am not using a clock chip, or because I'm not driving in true differential style).
Therefore, which is the better way to go? Seeing that http://www.altera.com/literature/an/an610.pdf Page 7, figure 4. Suggests to do this, what is the suggested pin type to use? Thank you
