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Altera_Forum
Honored Contributor
17 years agoRMII Mode Selection / Strapping CYCLONE III
Hi, I am working in ALTERA CYCLONE III . I have designed a module with the following NIOS II Processor + Custom Ethernet MAC working in RMII Mode + SSRAM. The Ethernet PHY used in this FPGA i...
Altera_Forum
Honored Contributor
12 years agoIn both cases you have this line
--- Quote Start --- INFO : PHY[0.0] - Speed = 1000, Duplex = Full --- Quote End --- which indicates that the MDIO communication with the PHY chip is working correctly. I have no idea where this line --- Quote Start --- INFO:PHY[-66.-17]-speed=unknown,duplex=Half --- Quote End --- is coming from but -66 and -17 are obviously bogus so it's probably a software crash that leads the function to be called with wrong parameters. Anyway, this just shows that the MDIO is working. It's using different signals than the MII or RMII lines, so this doesn't say if your RMII interface is working correctly. If you don't see any network traffic you should check on both sides (MII and RMII) with SignalTap is you see any packet coming or going from the Ethernet interface.