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Altera_Forum's avatar
Altera_Forum
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15 years ago

RGMII with Altera Stratix III DSP Dev. board

Hi all,

hope that you can help with this thread.

I have an Altera Stratix III DSP dev. board which I want to connect to a PC for data download.

This I want to do with Ethernet configured as RGMII at 100Mbs(just because there is an example for that with 3c120).

Basically the Nios will configure the TSE whereas a HDL module will take charge to put data on the ST-sink port of the TSE.

So my first question is about the configuration of the TSE through NiosII.

Is there a sequence on how to configure the TSE with NiosII ?

and about the PHY device (Marvell 88E1111), what is the sequence for initialization/reset ?

all the best

RR.

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    You can have a look at the Interniche driver for the TSE. Even if you don't use it in your application, it should show you how to initialize the TSE and the PHY.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Thank you Daixiwen,

    where I can find the Interniche driver for the TSE ?

    rr.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    If you are on windows with Quartus in its default install path, you should find them in

    C:\altera\*\ip\altera\triple_speed_ethernet\lib\sopc_builder\altera_triple_speed_ethernet\UCOSII\src\iniche

    There are also some low-level functions in

    C:\altera\*\ip\altera\triple_speed_ethernet\lib\sopc_builder\altera_triple_speed_ethernet\HAL\src
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Thank you Daixiwen,

    From the TSE's datasheet, each TSE has associated two PHY devices.

    How to know which one is actually the one that is on the Stratix III board ?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    No, the TSE can communicate with up to two PHY chips on the MDIO interface, through the MDIO0 and MDIO1 series of registers. But its RGMII interface can only be connected to one PHY. AFAIK there is only one PHY connected to the TSE on the Stratix board.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    We have a ready-to-use IP (GEDEK) just for this purpose, full gigabit performance, no CPU required, no SW stack, PC drivers included. It's very affordable, works out of the box, but it's not free.

    (google "GEDEK alse" should display the link).

    Bert