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Altera_Forum's avatar
Altera_Forum
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15 years ago

restricted fmax

My design with a Stratix2GX130 is timing-clean (no findings in TimeQuest' "report top failing paths"). The design is fully constrained, everything seems to be ok. But when I look at the list o...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Since you dont' have any failing paths, I assume your restricted fMax are still high enough to meet your constrains.

Thus, no, it's not even a warning much less a serious one.

The fMax report just provides some ballpark numbers on how fast each clock in your design could be.

But it's really just a ball park number.

(unrestricted fMax just takes into account the register-to-register delays

The restricted fMax takes into account some more things, such as max I/O toggle rates.

And neither takes into account signal that cross clock domains, for example.