Reset for PLL

There must be some official response from Intel about this somewhere. I can only imagine it's a very common question. Here are two solutions I have been using and found to work:

- Connecting the reset port to an external pin tied to ground on the PCB

- Using the PLL reference clock to generate a registered reset signal (e.g., using a counter or shift register)

The second solution could be expanded to reassert reset when lock is lost, however I thought this was precisely what the auto-reset setting was for, and hence I see no reason why Quartus does not allow you to tie reset to zero internally as in older families.