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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

rerun EDA netlist writer

hi everyone, i just installed altera ver 8.1. started a new project. did RTL simulation. created SDC. but when i click on run gate level timing simulation on the tools menu, i keep getting an ...
SFlow's avatar
SFlow
Icon for New Contributor rankNew Contributor
7 years ago

I'm running on 17.1 and had the same error occur. I was able to resolve the issue by simply restarting compilation. Hope that can help someone​