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Altera_Forum
Honored Contributor
14 years agoLattice and Xilinx still support .ABL, and Atmel supports .PLD(cupl) which is close to ABEL. These are on their CPLD families, which are not obsolete.
Most vendors can report in a choice of formats, and if you choose Verilog to VHDL, you can 'port' your design to almost any device, with a combination of your original source and the reports.