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Altera_Forum
Honored Contributor
14 years agoRemote update controller issue
Hi everyone,
I'm using the remote update controller (cyclone III) on my Cyclone IV GX dev board with a EPCS128 flash memory. I wish to have two firmwares in my EPCS (factory and application). Actually, I placed the firmware like this in the EPCS: 0x000000 Factory image (hw0 + sw0) 0x440000 Application image (hw1 + sw1) (I'm not using the flash programmer to load the image in flash memory) The nios II boots correctly on the factory image when I start the board. But when I try to reconfig the FPGA with the application image using the remote update controller, the Factory image is loaded... I write 0x110000 to the remote update controller, then start the reconfig for loading the application image. Is this address correct? I think my problem comes when I'm creating the application image. Here is my script to create the .flash: --- Quote Start --- java -jar C:\altera\11.0\nios2eds\bin\sof2flash.jar --epcs --input="..\..\2Dcam.sof" --output="2Dcam_sof.flash" --verbose java -jar C:\altera\11.0\nios2eds\bin\elf2flash.jar --epcs --after="2Dcam_sof.flash" --input="..\2DCam\2DCam.elf" --output="2DCam_elf.flash" --offset 0 rem merge the two files copy /b /y 2Dcam_sof.flash+2DCam_elf.flash 2DCam.flash --- Quote End --- I create factory and application image (.flash) with this script. And load the factory image at address 0x000000 and the application at address 0x440000 in EPCS. Do I have to make something different for the application image, because her address is not 0x000000? Has anyone the same problem? Best regards37 Replies
- Altera_Forum
Honored Contributor
Hallo
You must change the bootloader for the application image to start from the new address. - Altera_Forum
Honored Contributor
Thanks for the reply!
Can you explain me how to change the address in the bootloader? Regards - Altera_Forum
Honored Contributor
Hi,
The source code for the default bootloader is included in the Quartus distribution (C:\altera\11.1\ip\altera\nios2_ip\altera_nios2\boot_loader_sources) and must be modified for the application image. First you change the assembly file boot_loader_epcs_bits_sii_siii_ciii.S so that the bootloader for the application image jumps to the Nios code for the application image (which is just after the FPGA configuration for EPCS). Here is one way to change to this code: 1) Add a define to the offset to the application image:# define IMAGE_START 0x00440000 2) Replace all occurencs of the following code : (several places in the code) movi r_flash_ptr, xx with: movhi r_flash_ptr, %hi(IMAGE_START) ori r_flash_ptr, r_flash_ptr, xx 3) Add the following statement before fp_short_circuit: orhi r_flash_ptr, r_flash_ptr, %hi(IMAGE_START) This should work if the 16 lower bits of IMAGE_START are 0. Then run make (Last time I tried it I only got it working with the gcc3 quartus 10.0, not with gcc4). Then go to the obj directory and run: elf2hex --input="boot_loader_epcs_sii_siii_ciii.elf" --output="epcs_controller_boot_rom.hex" --base=0 --width=32 --end=1023 --record=4 --lower You must then replace the boot rom file in your design with this file. In Quartus 11.1 the file name may be changed to epcs_flash_controller_boot_rom_synth.hex. Note that you do not have to recompile the whole design, you just select 'Update Memory Iniialization File' in Quartus and run the asssembler after changing the bootloader. I have tested this for Stratix II,III,IV and Cyclone IV. - Altera_Forum
Honored Contributor
Thanks for the explication!
How do you create the file "boot_loader_epcs_sii_siii_ciii.elf" or where can I find it? Regards - Altera_Forum
Honored Contributor
The file is generated when you run "make" in the boot_loader_sources directory (it is found under obj)
- Altera_Forum
Honored Contributor
Thanks for the reply!
But I have ever the same problem. The Application image doesn't work. Here is my procedure: 1) I have changed the "boot_loader_epcs_bits_sii_siii_ciii.S" 2) run "make" 3) I have created the "epcs_controller_boot_rom.hex" with your code: --- Quote Start --- elf2hex --input="boot_loader_epcs_sii_siii_ciii.elf" --output="epcs_controller_boot_rom.hex" --base=0 --width=32 --end=1023 --record=4 --lower --- Quote End --- 4)In Quartus, I have selected "Update Memory Initialization File" and run the assembler: --- Quote Start --- Info (39025): Processed Memory Initialization File C:/Users/julien.egli/Atracsys/CI/firmware.atr.2Dcam/ODSP2b_DBC4GX150/dev/FPGA/2Dcam/sopc_2dcam_epcs_flash_controller_0_boot_rom_synth.hex --- Quote End --- 5) Created the Application image: --- Quote Start --- java -jar C:\altera\11.0\nios2eds\bin\sof2flash.jar --epcs --input="..\..\2Dcam.sof" --output="2Dcam_sof.flash" --verbose java -jar C:\altera\11.0\nios2eds\bin\elf2flash.jar --epcs --after="2Dcam_sof.flash" --input="..\2DCam\2DCam.elf" --output="2DCam_elf.flash" --offset 0 rem merge the two files copy /b /y 2Dcam_sof.flash+2DCam_elf.flash 2DCam.flash --- Quote End --- 6) Written the image at address "0x440000" in EPCS using "alt_write_flash" function 7)Then I reboot on the factory image and use the Remote Update controller to reconfig with the application image: Offset for reconfiguration image in flash: 0x110000 8)Then I start the reconfig of the FPGA Please, can you tell me if I do something wrong? Regards - Altera_Forum
Honored Contributor
I cannot see that you do anything wrong, its correct to shift the address 2 bits right. Here are some ideas to further debugging:
1) Do you disable the watchdog ? (0 to parameter 3 of altremote_update) 2) Read out and check the registers of altremote_update before and after you try to restart in application image. Note that its confusing which value to use for read_source for Cyclone III/IV. I have come to that read_source shall be 0 for parameter 1 (Current image), 2 for parameter 4 (Boot address) and 1 for parameter 7 (Config source) 3) Make the configuration and software different for factory/application image so that you are sure that you looking at the correct image. 4) Verify that you have written the flash correctly. 5) Use signaltap to see what is happening In your final design its a good idea to check the application image on the EPCS flash before restarting to it from factory image. - Altera_Forum
Honored Contributor
Must I change the reset vector offset of the CPU for the application image?
Regards - Altera_Forum
Honored Contributor
No, you set the reset vector for the Nios processor to epcs_flash_controller with offset 0 for both factory and application image.
- Altera_Forum
Honored Contributor
how can I know if the correct bootloader is taken when I use the elf2flash?
Do I need to do somthing regarding the boot record? Thanks