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Altera_Forum
Honored Contributor
Honored ContributorRegarding the parallel processing of matrix data
We are trying to divide the complete data available, in row buffers of different size, and try implementing parallel processing, by calling the row buffers as individual separate entities. But, imple...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Its still not clear what you're doing. Is it a software solution or firmware on an FPGA? --- Quote End --- Its FPGA based. I'm doing it with Xilinx ISE and Model-Sim as a simulator.
