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Honored Contributor
Honored ContributorRegarding PLL_CLKOUTp & PLL_CLKOUTn pins in Cyclone FPGA -IV E series
Dear sir, I am new to fpga programming. I want to know where & how do we configure PLL_CLKOUTx pin as a a. Dedicated PLL clock output b. General I/O Regards, Thulasi
Altera_ForumHonored Contributor
Honored ContributorDear Sir,
Thanks a lot. Now, in connection guildelines of Cyclone-IV, it is mentioned as "When not using this pin as a clock output, this pin may be used as a user I/O. When not using these pins, connect them as defined in Quartus II software. " What is the recommended option that needs to be selected for this type of unused pins in Quartus software? The following are the available options. As bidirectional As input tri-stated As o/p driving an unspecified signal As output driving ground As o/p driving VCC and so on... Please help. Regards, Thulasi
